Field of Invention
The present invention relates generally to the field of load distribution. More specifically, the present invention is related to a system and method for dividing and synchronizing a processing task across multiple processing elements/processors in hardware.
Discussion of Related Art
In the prior art, the processing load (of a processing element) to determine what command to issue is relatively high. The processing load to determine what command to issue can be partially or fully offloaded to a multiplicity of other processing elements (e.g. processors, processor cores, or custom processing circuitry). However, this distribution of load causes commands to be determined from multiple processing elements. It can become a challenge to ensure the module command queues (FIFOs) are not overfilled, thus synchronization is required amongst the multiplicity of processing elements. In the prior art, such synchronization is performed using software techniques, such as semaphores and mutexes to a shared available space count variable in memory. However, this takes additional processing time, making this process non-optimal. To further compound the problem, there may be a need to keep the time from command issue to execution minimized, which tends to keep the command queue shallow.
Embodiments of the present invention are an improvement over prior art systems and methods.